Manufacturing of semiconductor devices is dependent upon the accurate replication of computer aided design (CAD) generated patterns onto the surface of a device substrate. The replication process is typically performed using optical lithography followed by a variety of subtractive (etch), additive (deposition) and material modification (e.g., oxidations, ion implants, and the like) processes. Optical lithography patterning involves the illumination of a metallic coated quartz plate known as a photo mask which contains a magnified image of the computer generated pattern etched into the metallic layer. This illuminated image is reduced in size and patterned into a photosensitive film on the device substrate.
To achieve the required density, 1 Gbit-era DRAMs will require a cell with an area of approximately eight times the lithographic feature size squared. Convention 8 square folded bit line DRAM cells require a transfer device channel length of one lithographic feature. However, this shrinkage also reduces transfer device channel length which is not desirable.